c - Raspberry Pi UART TX/RX loop delay -

i'm attempting use rpi communicate commercial microcontroller via uart. ultimate goal feedback control system, first step, i'm trying following loop working:

• rpi transmits command 1 on tx pin external controller (48 bytes)
• rpi receives response command 1 on rx pin (48 bytes)
• rpi transmits command 2 on tx pin external controller (48 bytes)
• rpi receives response command 2 on rx pin (48 bytes)
• rpi transmits command 3 on tx pin external controller (48 bytes)
• rpi receives response command 3 on rx pin (48 bytes)

. . . etc.

i've managed read , write uart using following code, i'm still getting weird behavior that's causing loop out of sync:

int main (int argc, char *argv[]){      setup_uart(); // init uart      int test_val = 123;      int j = 0;     while( 1 ){         delaymicroseconds( 8900 );         tx_value(test_val+j);         rx_value();         ++j;     } } 

the tx_value , rx_value methods make calls generic unix system call write , read methods, respectively, using method described here:

void rx_value() {     if (uart0_filestream != -1)     {         // read 48 bytes         rx_length = read(uart0_filestream, (void*)rx_buffer, 48);     } } 

the uart configured follows:

void setup_uart(void) {     uart0_filestream = open("/dev/ttyama0", o_rdwr | o_noctty);      struct termios options;     tcgetattr(uart0_filestream, &options);     options.c_cflag = b115200 | cs8 | clocal | cread;   //<set baud rate 115200     options.c_iflag = ignpar | icrnl;     options.c_oflag = 0;     options.c_lflag = 0;      tcflush(uart0_filestream, tciflush);     tcsetattr(uart0_filestream, tcsanow, &options); } 

when running code listed, i'm not getting desired send/receive loop. data there, looks like

• rpi transmits command 1 on tx pin external controller (48 bytes)
• rpi receives part of response command 1 on rx pin (8 bytes)
• rpi transmits command 2 on tx pin external controller (48 bytes)
• rpi receives rest of response command 1 on rx pin (40 bytes)
• rpi transmits command 3 on tx pin external controller (48 bytes)
• rpi receives response command 2 on rx pin (48 bytes)

. . . etc. i.e., there's delay of 1 cycle between tx , rx, non-ideal desired control infrastructure.

i have tried following hacks/mitigation techniques, , many permutations thereof:

• sending, reading twice on first loop --> first packet gets further divided, resulting in same delayed loop
• setting options.c_cc[vmin] in both blocking , non-blocking mode --> when set 0, first rx receives 0 bytes, , remaining calls receive 48 --> same steady-state loop above; when set 8, same steady-state loop above; when set 48, program hangs
• increasing call delaymicroseconds several seconds --> no change in behavior

i've looked @ tx/rx pins using logic analyzer, , there's more time between first tx/rx call , others, there no breaks within 48-byte transmissions themselves, i'm not sure why first rx call can receive 8 of bytes. i've been doing research on how read command works, it's such low-level system call i'm not sure how approach problem. can offer insight why might happening, or suggestions alternative methods might not have problem?

thanks!